Thèse de doctorat en Génie électrique
Soutenue en 2009
Pas de résumé disponible.
Despite being a popular research topic, digital control is still seldom applied in practical low-power high-frequency integrated SMPS converters. Phones, PDAs and music/video players are still mainly designed with analog PWM control inside the voltage regulator blocks. This is mainly due to the apparent complexity of implementation, cost constraint and absence of digital controller architectures that can support operation at switching frequencies significantly higher than 1MHz with low-power consumption features. Broader acceptance of digital techniques in low-power high-frequency SMPS is still hampered by practical problems of the combination of cost issues, trade-off performances and power consumption. However, with the rapid development of Very Large-Scale Integration (VLSI) technologies and CMOS manufacturing technique, and associated with their design tools in the last decade, it is now very possible to realize the high performance digital control in power electronics system by high-speed low-power digital devices (FPGA, ASIC, etc). With these advantages, the implementation of digital controller has become more feasible for low-power high-frequency SMPS design in portable electronics applications. The research interest of the thesis is to explore practical ways of incorporating advantages of digital control in practical implementation, investigates issues of digital controller implementation at lower power levels, gives detailed guidelines for digital controller design and hardware selection, and proposes new hardware solutions for the main functional digital controller blocks. Two main objectives of this work focus the implementation of high-resolution high-frequency digital PWM (DPWM) and high-performance digital control algorithms for SMPS in FPGA-based realization